[2025-09-21T07:50:34Z INFO snow_core::mac::compact::bus] Skipping memory test [2025-09-21T07:50:34Z INFO snow_core::cpu_m68k::cpu] Reset - SSP: B2E362A8, PC: 0040002A [2025-09-21T07:50:34Z INFO single] No replay file found [2025-09-21T07:50:34Z INFO single] Starting [2025-09-21T07:50:34Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3001246376, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Accurate, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:34Z INFO single] Event: NextCode [2025-09-21T07:50:34Z INFO snow_core::mac::swim::drive] Drive 0: disk inserted, 80 tracks, title: 'The Crimson Crown' [2025-09-21T07:50:34Z INFO snow_core::emulator] Running [2025-09-21T07:50:34Z INFO snow_core::mac::compact::bus] Emulation speed: Uncapped [2025-09-21T07:50:34Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3001246376, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Accurate, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:34Z INFO single] Event: NextCode [2025-09-21T07:50:34Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3001246376, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Accurate, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:34Z INFO single] Event: NextCode [2025-09-21T07:50:35Z WARN snow_core::mac::scc] B unimplemented wr reg 4 4C [2025-09-21T07:50:35Z WARN snow_core::mac::scc] A unimplemented wr reg 4 4C [2025-09-21T07:50:35Z DEBUG snow_core::cpu_m68k::cpu] Illegal instruction PC 00400402: 4E7B 0100111001111011 Cannot decode instruction: 0100111001111011 [2025-09-21T07:50:35Z WARN snow_core::cpu_m68k::cpu] Illegal instruction at PC $00400402 [2025-09-21T07:50:35Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294965853, 207, 211, 4294901798, 1840700269, 4196096, 0, 0], a: [4194276, 4193830, 4195736, 4204180, 4193536, 15720958, 4194304], usp: 0, isp: 1020, sr: RegisterSR { 0: 9988, sr: 9988, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4205204, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 5660828, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:35Z INFO single] Event: NextCode [2025-09-21T07:50:35Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207454, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 13656774, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:35Z INFO single] Event: NextCode [2025-09-21T07:50:36Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207454, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 21578720, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:36Z INFO single] Event: NextCode [2025-09-21T07:50:36Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207460, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 30037468, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:36Z INFO single] Event: NextCode [2025-09-21T07:50:37Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [222452, 0, 4301392, 65535, 0, 1262682113, 0, 0], a: [4301414, 4301392, 7158, 6287360, 7216, 15720958, 2096114], usp: 0, isp: 2096066, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302922, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 38352032, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:37Z INFO single] Event: NextCode [2025-09-21T07:50:37Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 97362, 128, 5, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 45010744, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:37Z INFO single] Event: NextCode [2025-09-21T07:50:38Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 110321, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 59506066, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:38Z INFO single] Event: NextCode [2025-09-21T07:50:38Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 109200, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 71896830, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:38Z INFO single] Event: NextCode [2025-09-21T07:50:39Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 121209, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 86395514, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:39Z INFO single] Event: NextCode [2025-09-21T07:50:39Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 67459, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 100894278, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:39Z INFO single] Event: NextCode [2025-09-21T07:50:40Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 84342, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 114601388, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:40Z INFO single] Event: NextCode [2025-09-21T07:50:40Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 83044, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 127650258, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:40Z INFO single] Event: NextCode [2025-09-21T07:50:41Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 2147484398, 4294901760, 1840644096, 4196096, 256, 0], a: [2096128, 2147491252, 4206940, 4198110, 225, 2096528, 2097152], usp: 0, isp: 2096088, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 133358780, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:41Z INFO single] Event: NextCode [2025-09-21T07:50:41Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 8660, 86016, 3578, 1476395061, 4199004, 256, 0], a: [21406, 5920, 17846, 21424, 5632, 2096528, 5632], usp: 0, isp: 2095952, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4239794, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 140375268, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:41Z INFO single] Event: NextCode [2025-09-21T07:50:42Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [12, 140, 0, 1, 11, 2048, 0, 9], a: [932, 7662, 7604, 21674, 21646, 0, 15960], usp: 0, isp: 2095936, sr: RegisterSR { 0: 8448, sr: 8448, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4410214, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 148466162, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:42Z INFO single] Event: NextCode [2025-09-21T07:50:42Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 3, 8, 0, 21504, 42, 3], a: [932, 2147491252, 4206940, 16754, 2098158, 2096528, 15960], usp: 0, isp: 2096008, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 155528284, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 20, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:42Z INFO single] Event: NextCode [2025-09-21T07:50:43Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [12, 140, 5, 1229867272, 255, 4096, 8, 2], a: [4208008, 15720958, 4206940, 6780, 17306, 0, 15960], usp: 0, isp: 2095806, sr: RegisterSR { 0: 8468, sr: 8468, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4208060, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 162894534, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 2, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:43Z INFO single] Event: NextCode [2025-09-21T07:50:43Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 56, 0, 178, 4294836635, 241, 185, 5], a: [16893, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4171094, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414594, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 170400396, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 60, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:43Z INFO single] Event: NextCode [2025-09-21T07:50:44Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 0, 16, 234, 4294836656, 89, 109, 9], a: [28995, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4147186, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414662, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 177352530, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 2, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:44Z INFO single] Event: NextCode [2025-09-21T07:50:44Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 1114111, 1, 15, 65535, 0, 4128768, 4390912], a: [2, 4279316, 4146642, 60, 4423224, 4191294, 4146560], usp: 0, isp: 4146442, sr: RegisterSR { 0: 8200, sr: 8200, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4279184, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 182420036, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 43, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:44Z INFO single] Event: NextCode [2025-09-21T07:50:45Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 160, 64, 154, 4294836596, 40, 34, 131], a: [32196, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4147276, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414576, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 189745848, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 21, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:45Z INFO single] Event: NextCode [2025-09-21T07:50:45Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 252, 173, 239, 4294836335, 200, 14, 28], a: [4136170, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4147236, sr: RegisterSR { 0: 8977, sr: 8977, ccr: 17, c: true, v: false, z: false, n: false, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414662, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 195489290, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 77, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:45Z INFO single] Event: NextCode [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:45Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:50:46Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:50:46Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16, 95, 7, 717, 0, 3, 4137548, 0], a: [4208008, 15720958, 4206940, 6780, 4124662, 4171424, 4147586], usp: 0, isp: 4147198, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4208996, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 202012148, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 69, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:46Z INFO single] Event: NextCode [2025-09-21T07:50:46Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 7, 717, 0, 3, 4137548, 0], a: [4137596, 2147491252, 4206940, 4154494, 4124662, 4171424, 4147586], usp: 0, isp: 4147258, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 209651528, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 69, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:46Z INFO single] Event: NextCode [2025-09-21T07:50:47Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [315, 65535, 202, 65535, 0, 0, 65535, 0], a: [4154494, 4154058, 2688492270, 4154494, 0, 4171424, 4154494], usp: 0, isp: 4147658, sr: RegisterSR { 0: 8212, sr: 8212, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 112196, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 217921014, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 49, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:47Z INFO single] Event: NextCode [2025-09-21T07:50:47Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [315, 65535, 0, 65535, 0, 0, 65535, 0], a: [4154494, 4154058, 2688492270, 4154494, 0, 4171424, 4154494], usp: 0, isp: 4147658, sr: RegisterSR { 0: 8212, sr: 8212, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 112204, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 225040238, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 49, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:47Z INFO single] Event: NextCode [2025-09-21T07:50:48Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [315, 0, 0, 65535, 0, 0, 65535, 0], a: [4154494, 4154058, 2688492270, 4154494, 0, 4171424, 4154494], usp: 0, isp: 4147654, sr: RegisterSR { 0: 8212, sr: 8212, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 112236, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 233152992, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 49, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:48Z INFO single] Event: NextCode [2025-09-21T07:50:48Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [315, 65535, 0, 65535, 0, 0, 65535, 0], a: [4154494, 4154058, 2688492270, 4154494, 0, 4171424, 4154494], usp: 0, isp: 4147654, sr: RegisterSR { 0: 8212, sr: 8212, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 112230, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 246393946, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 49, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:48Z INFO single] Event: NextCode [2025-09-21T07:50:49Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [315, 0, 0, 65535, 0, 0, 65535, 0], a: [4154494, 4154058, 2688492270, 4154494, 0, 4171424, 4154494], usp: 0, isp: 4147654, sr: RegisterSR { 0: 8212, sr: 8212, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 112236, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 259205744, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 49, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:49Z INFO single] Event: NextCode [2025-09-21T07:50:49Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [315, 65535, 0, 65535, 0, 0, 65535, 0], a: [4154494, 4154058, 2688492270, 4154494, 0, 4171424, 4154494], usp: 0, isp: 4147658, sr: RegisterSR { 0: 8212, sr: 8212, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 112204, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 273014438, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 49, image_title: "The Crimson Crown", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:50:49Z INFO single] Event: NextCode [2025-09-21T07:50:50Z INFO single] deduplicated 120 frames to 1